ho fatto un report tramite RAMMon, lo posto in modo che possiate vedere e consigliarmi in base alle caratteristiche del pc...Grazie per la pazienza...
RAMMon v1.0 Build: 1005 built with SysInfo v1.0 Build: 1027
PassMark (R) Software
www.passmark.comMemmory summary for GABBO-PC:
Number of Memory Devices: 1 Total Physical Memory: 1014 MB (0 MB)
Total Available Physical Memory: 252 MB
Memory Load: 75%
Item | Slot #1 | Slot #2 |
-------------------------------------------------------------------------------|----------------------|-----------------|-
Ram Type | DDR2 | Not Populated |
Standard Name | DDR2-800 | |
Module Name | PC2-6400 | |
Memory Capacity (MB) | 1024 | |
Bus Clockspeed (Mhz) | 400.00 | |
Jedec Manufacture Name | ASint Technology | |
Search Amazon.com | Search! | |
SPD Revision | 1.2 | |
Registered | No | |
ECC | No | |
DIMM Slot # | 1 | |
Manufactured | Year 0 | |
Module Part # | SSY2128M8-JGE3B | |
Module Revision | 0x3130 | |
Module Serial # | 0x8 | |
Module Manufacturing Location | 70 | |
# of Row Addressing Bits | 14 | |
# of Column Addressing Bits | 10 | |
# of Banks | 8 | |
# of Ranks | 1 | |
Device Width in Bits | 8 | |
Bus Width in Bits | 64 | |
Module Voltage | SSTL 1.8V | |
CAS Latencies Supported | 4 5 6 | |
Timings @ Max Frequency | 6-6-6-18 | |
Minimum Clock Cycle Time, tCK (ns) | 2.500 | |
Minimum CAS Latency Time, tAA (ns) | 15.000 | |
Minimum RAS to CAS Delay, tRCD (ns) | 15.000 | |
Minimum Row Precharge Time, tRP (ns) | 15.000 | |
Minimum Active to Precharge Time, tRAS (ns) | 45.000 | |
Minimum Row Active to Row Active Delay, tRRD (ns) | 7.500 | |
Minimum Auto-Refresh to Active/Auto-Refresh Time, tRC (ns) | 60.000 | |
Minimum Auto-Refresh to Active/Auto-Refresh Command Period, tRFC (ns) | 127.500 | |
| | |
DDR2 Specific SPD Attributes | | |
Data Access Time from Clock, tAC (ns) | 0.400 | |
Clock Cycle Time at Medium CAS Latency (ns) | 3.000 | |
Data Access Time at Medium CAS Latency (ns) | 0.450 | |
Clock Cycle Time at Short CAS Latency (ns) | 3.750 | |
Data Access Time at Short CAS Latency (ns) | 0.500 | |
Maximum Clock Cycle Time (ns) | 8.000 | |
Write Recover Time, tWR (ns) | 15.000 | |
Internal Write to Read Command Delay, tWTR (ns) | 7.500 | |
Internal Read to Precharge Command Delay, tRTP (ns) | 7.500 | |
Address/Command Setup Time Before Clock, tIS (ns) | 0.170 | |
Address/Command Hold Time After Clock, tIH (ns) | 0.250 | |
Data Input Setup Time Before Strobe, tDS (ns) | 0.050 | |
Data Input Hold Time After Strobe, tDH (ns) | 0.120 | |
Maximum Skew Between DQS and DQ Signals (ns) | 0.200 | |
Maximum Read Data hold Skew Factor (ns) | 0.240 | |
PLL Relock Time (ns) | 0.000 | |
DRAM Package Type | Planar | |
Burst Lengths Supported | 4 8 | |
Refresh Rate | Reduced (7.8us) | |
# of PLLS on DIMM | 0 | |
FET Switch External Enable | No | |
Analysis Probe Installed | No | |
Weak Driver Supported | Yes | |
50 Ohm ODT Supported | Yes | |
Partial Array Self Refresh Supported | Yes | |
Module Type | SO-DIMM | |
Module Height (mm) | 30.0 | |